1. Field of the Invention
The present invention relates to a semiconductor device and an information processing system including the same, and more particularly to a semiconductor device that can change the characteristics of input circuits and an information processing system including the same.
2. Description of Related Art
Semiconductor devices such as a dynamic random access memory (DRAM) have input circuits for accepting various types of input signals supplied from outside, such as address signals, command signals, and write data. In general, there is a tradeoff between the operating speed and power consumption of an input circuit. Input circuits having a high operating speed characteristic are high in power consumption. Input circuits with a low power consumption characteristic are low in operating speed. Input circuits that satisfy both speed and power consumption need to be provided based on the operating frequency the semiconductor device needs. For example, in a semiconductor device of variable operating speed (operating frequency), input circuits need to be designed for the highest possible operating speed. In such a case, there is the problem that the input circuits have excessively high power consumption if the actual setting of the operating speed is low.
To solve such a problem, as discussed in Japanese Patent Application Laid-Open Nos. 2001-94410 and H09-186579, a plurality of input circuits having different characteristics may be connected in parallel so that any one of the input circuits can be selected depending on the characteristic needed.
Switching the input circuit to use among a plurality of input circuits connected in parallel may produce noise or hazard in the output signal from the input circuits. Such noise or hazard can cause subsequent circuits to error. This problem will not occur from a method in which one of a plurality of input circuits is selected before power-on, or typically in the manufacturing phase in advance. The foregoing noise problem is inevitable, however, in a method in which one of a plurality of input circuits can be selected in real time after power-on. For example, a controller for controlling the semiconductor device issues a mode register setting command to the semiconductor device to select the operating frequency of the semiconductor device after the semiconductor device is powered on or after hardware reset. In DRAM, the setting of a CAS write latency, which indicates the latency from the reception of an access command to a memory cell to the input of data, indirectly specifies the operating frequency of the semiconductor device. The smaller the value of the CAS write latency, the lower the operating frequency between the memory controller and the DRAM. The greater the value of the CAS write latency, the higher the operating frequency.